Everyone knows that the impedance must be continuous. In PCB design, there are always times when the impedance cannot be continuous. How to do?

Characteristic impedance: also known as "characteristic impedance", it is not a DC resistance, it is a concept in long-term transmission. In the high frequency range, during signal transmission, where the signal edge arrives, an instant current will be generated between the signal line and the reference plane (power or ground plane) due to the establishment of an electric field.

If the transmission line is isotropic, then as long as the signal is transmitting, there will always be a current I, and if the output voltage of the signal is V, the transmission line will be equivalent to a resistance during the signal transmission process, the size is V/I , Call this equivalent resistance the characteristic impedance Z of the transmission line.

In the process of signal transmission, if the characteristic impedance on the transmission path changes, the signal will be reflected at the node where the impedance is discontinuous.

The factors that affect the characteristic impedance are: dielectric constant, dielectric thickness, line width, copper foil thickness

1. Gradient line

Some RF devices have small packages. The SMD pad width may be as small as 12 mils, and the RF signal line width may be more than 50 mils. Gradient lines must be used, and line width mutations are prohibited. The gradient line is shown in the figure, and the line of the transition part should not be too long.

2. Corner

If the RF signal line runs at a right angle, the effective line width at the corner will increase, and the impedance will be discontinuous, causing signal reflection. In order to reduce the discontinuity, to deal with the corners, there are two methods: corner cutting and rounding. The radius of the arc angle should be large enough, generally speaking, to ensure: R>3W. As shown on the right.

3. Large pad

When there are large pads on the 50 ohm microstrip line, the large pads are equivalent to distributed capacitance, which destroys the characteristic impedance continuity of the microstrip line. Two methods can be taken to improve at the same time: firstly thicken the microstrip line dielectric, and secondly hollow out the ground plane under the pad, which can reduce the distributed capacitance of the pad. As shown below.

4. Vias

Vias are metal cylinders plated outside the through holes between the top and bottom layers of the circuit board. Signal vias connect transmission lines on different layers. The via stub is the unused part of the via. Via pads are annular spacers that connect the via to the top or internal transmission line. Isolation plates are annular gaps in each power or ground plane to prevent short circuits to the power and ground planes.

After rigorous physical theory derivation and approximate analysis, the equivalent circuit model of a via can be a grounded capacitor connected in series at both ends of an inductor, as shown in the figure.

It can be seen from the equivalent circuit model that the via itself has parasitic capacitance to ground. Assume that the diameter of the via anti-pad is D2, the diameter of the via pad is D1, the thickness of the PCB board is T, and the dielectric constant of the board substrate is ε, then the parasitic capacitance of the via is approximately:

The parasitic capacitance of the via can cause the signal rise time to be prolonged and the transmission speed to slow down, thereby deteriorating the signal quality. Similarly, vias also have parasitic inductance. In high-speed digital PCBs, parasitic inductance often causes more damage than parasitic capacitance.

Its parasitic series inductance will weaken the contribution of the bypass capacitor, thereby weakening the filtering effect of the entire power system. Assume that L is the inductance of the via, h is the length of the via, and d is the diameter of the center hole. The approximate parasitic inductance of the via is similar to:

Vias are one of the important factors that cause impedance discontinuities on the RF channel. If the signal frequency is greater than 1GHz, the impact of vias must be considered.

Common methods to reduce the discontinuity of via impedance include: adopting a diskless process, selecting an outlet method, and optimizing the anti-pad diameter. Optimizing the anti-pad diameter is a commonly used method to reduce impedance discontinuities. Since the characteristics of the vias are related to the structural dimensions such as the aperture, the pad, the anti-pad, the stacked structure, and the wiring method, it is recommended to use HFSS and Optimetrics to optimize the simulation according to the specific situation during each design.

When using a parametric model, the modeling process is simple. When reviewing, PCB designers are required to provide corresponding simulation documents.

The diameter of the via, the diameter of the pad, the depth, and the anti-pad will bring changes, resulting in impedance discontinuity, reflection and insertion loss severity.

5. Through Hole Coaxial Connector

Similar to the via structure, the through-hole coaxial connector also has impedance discontinuities, so the solution is the same as that of the via. Commonly used methods to reduce the impedance discontinuity of through-hole coaxial connectors are also: using a diskless process, a suitable outlet method, and optimizing the diameter of the anti-pad.